case 4: /* CR4 */
old_cr = v->arch.hvm_vmx.cpu_shadow_cr4;
- if ( value & ~mmu_cr4_features )
+ if ( value & X86_CR4_RESERVED_BITS )
{
- HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempts to enable unsupported "
- "CR4 features %lx (host %lx)",
- value, mmu_cr4_features);
+ HVM_DBG_LOG(DBG_LEVEL_1,
+ "Guest attempts to set reserved bit in CR4: %lx",
+ value);
vmx_inject_hw_exception(v, TRAP_gp_fault, 0);
break;
}
+
if ( (value & X86_CR4_PAE) && !(old_cr & X86_CR4_PAE) )
{
if ( vmx_pgbit_test(v) )
#define X86_CR4_OSXMMEXCPT 0x0400 /* enable unmasked SSE exceptions */
#define X86_CR4_VMXE 0x2000 /* enable VMX */
+#define X86_CR4_RESERVED_BITS \
+ ~(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | \
+ X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE | \
+ X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE | \
+ X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)
+
/*
* Trap/fault mnemonics.
*/